Thursday, 5 September 2024, 15:00 CEST
In recent years, HPC systems have become increasingly complex and heterogeneous, making application development and optimisation challenging. To this respect, intuitive performance models like the Cache-aware Roofline Model (CARM) offer effective guidance by providing insights into bottlenecks that limit the application’s ability to reach the system’s maximum performance. The current landscape of CARM-enabled tools covers either vendor-specific (Intel Advisor), not sufficiently developed (AMD) or simply non-existing (ARM, RISC-V) tools.
The focus of this webinar is the CARM Tool, which was developed to address this problem, by extending CARM support to all major CPU architectures and ISAs, i.e., x86 (Intel, AMD), ARM, and RISC-V. The proposed tool includes automatically generated assembly microbenchmarks, specifically tailored to cover a full performance spectrum of modern CPUs (from scalar to all supported vector ISA extensions) for both computational units and all memory hierarchy levels. The tool also provides application profiling capabilities in the scope of the CARM, to facilitate application optimisations using the CARM’s insight. Additionally, this webinar will include a live demonstration of the capabilities of this tool including a short tutorial of its usage.
About the Presenter
José Morgado is an Assistant Researcher at INESC-ID with a Masters in Electrical and Computer Engineering obtained from Instituto Superior Técnico, University of Lisbon, Portugal. His research interests include High Performance Computing, Roofline Modelling, and Computer Architecture.